In recent years, concomitant with size and weight reductions, functionality increases and price reductions of various types of analogue and digital equipment for consumer and industrial use, printed circuit boards have changed from being single-sided boards to double-sided boards, and moreover development of fine-pitch multilayer boards is progressing rapidly. In a process for machining double-sided and multilayer boards a method is conventionally implemented whereby, as a pre-treatment before electroplating copper onto the insulator outer surface of through holes, blind holes and the like in which the insulator is exposed, a noble metal catalyst treatment employing a palladium compound is performed, after which chemical copper plating is performed, and then copper electroplating is performed. Increasing costs of noble metal catalyst treatment and chemical copper plating due to steep rises in the price of palladium, which is a noble metal catalyst raw material, and concerns over the effects on the human body of the environmentally harmful substance formalin, which is a reducing agent in chemical copper plating, have led to investigations of techniques which do not use these substances. Of these, a method of forming an electrically conductive polymer film directly on the insulator outer surface is attracting attention because it allows both the noble metal catalyst treatment and chemical copper plating to be omitted.
Polyanilines, polypyrroles, polyfuranes, polythiophenes and the like are known as electrically conductive polymers used for the abovementioned purpose, and methods of forming films have been proposed which employ these in the form of liquid mixtures with alkanesulphonic acids, polystyrenesulphonic acid and salts thereof. However, the long-term liquid stability of these treatment liquids is poor, and because the electrical conductivity of the electrically conductive polymer film is low there are portions in which the electroplated copper layer does not form. Other problems have also been identified, for example in that the stability over time of the electrically conductive polymer film is poor and the film deteriorates over time. Further, the adhesive strength between the insulator and the layer of copper plating is weak, and is not at a sufficient level to allow it to be used as a printed circuit board, and it can thus only be adopted in a very small portion of such applications.
A prior-art method for forming an electrically conductive polymer film and a layer of copper plating on the outer surface of an insulator will now be described.
Patent literature article 1 for example discloses a method in which the outer surfaces of a polymer or ceramic substrate are treated using an oxidising solution such as a permanganate, after which a monomer such as pyrrole, furan or thiophene is deposited, and then an electrically conductive polymer is formed by oxidative polymerization using peroxodisulphuric acid, for example.
Patent literature article 2 for example describes a method of forming a through hole in a copper laminated plate and a multilayer plate, subjecting the same to a potassium permanganate treatment as an oxidising pre-treatment, performing a monomeric thiophene microemulsion treatment, subsequently or simultaneously performing acid treatment using polystyrenesulphonic acid to generate an electrically conductive layer, and electrodepositing a metal onto this.
Patent literature article 3 proposes a method in which a cleaned printed circuit board, through which a hole has been made, is cleaned using a neutral permanganate solution and is then subjected to acid cleaning to eliminate metal oxides on the copper foil and thereby solve the problem of poor adhesion between the copper foil and the electroplated copper, and the problem of the appearance of boundaries in connecting portions.
Patent literature article 4 proposes bringing a nonconductive substrate outer surface into contact with a water-soluble polymer, next treating this with a permanganate solution, then treating this with a microemulsion solution of a thiophene compound and an alkanesulphonic acid, and performing electroplating.
Patent literature article 5 proposes a method of subjecting a printed circuit board having a machined hole to a direct metallization treatment, wherein a manganese dioxide layer is formed by means of an alkaline permanganate treatment, after which hydroxides are washed using an acidic solution and this is then neutralised using an alkaline aqueous solution, after which a conductive film is formed using a microemulsion of 3,4-ethylenedioxythiophene, polystyrenesulphonic acid, and a mixture thereof, thereby improving the covering ability of the copper plating and its ability to attach around the hole portions, and making it possible to ensure a reproducible production process.
Patent literature article 6 proposes a method in which a board comprising an insulating substrate of epoxy resin or the like, laminated on both sides with copper, is subjected to blind microvia machining, and this is plated directly using an electrically conductive polymer, colloidal particles including a noble metal, or electrically conductive carbon particles.
From among the patent literature recited hereinabove, the method recited in patent literature article 4, in which an electrically conductive polymer film is formed using a microemulsion solution of a thiophene compound and an alkanesulphonic acid, has excellent solution stability and electrically conductive polymer film stability, and further the covering properties during copper plating are also excellent.
However, in all of the abovementioned prior art, when copper electroplating was performed on a portion of a polyimide resin or an epoxy resin which had been subjected to an electrically conductive polymer treatment, and a copper pattern with a pitch of 80 μm (the cycle comprising the total of the line width and the space being 80 μm, the same applies hereinafter) was created using a photolithographic method and was observed under a microscope, a critical defect, namely peeling of part of the copper pattern, was already visible at the time of pattern formation, and moreover when observed after an adhesive tape peeling test had been performed, multiple occurrences of copper pattern peeling were identified. When the adhesive strength of these specimens was measured at room temperature (hereinafter: normal condition adhesive strength), the adhesive strength was found to be low, at 1.9 N/cm or less, and locational variation was large. Further, when the adhesive strength of these specimens was measured after having been heat-treated in air at 150° C. for 158 hours (hereinafter: adhesive strength after heat resistance), the adhesive strength was even lower, at 0.8 N/cm or less, and peeling of the pattern between the insulator and the copper occurred readily in almost all locations. It was thus determined that these methods could not be applied to printed circuit boards for applications in which they are subjected to high-temperature soldering (280° C.) for mounting of components or to machining in a high-temperature atmosphere (approximately 400° C.) when mounting ICs, or for applications in which they are used in a high-temperature condition.
Further, when manganese dioxide is formed on the insulator outer surface during permanganate treatment, sometimes manganese hydroxide in the form of a fine powder is also formed on the copper layer outer surface at the same time. Manganese hydroxide has a weak oxidising power, and an electrically conductive polymer does not form on the copper layer, but during copper electroplating copper protuberances of between several μm to several tens of μm are generated due to the manganese hydroxide in the form of a fine powder. In addition, if a copper circuit pattern is formed by means of a photolithographic method, tearing and cissing of the photosensitive resist occurs. In addition, in the copper protuberance portions a difference arises in the etching speed as a result of differences in the thickness of the copper film, and in the same way as with the drawbacks mentioned hereinabove, breaks in the copper pattern, shorts, voids, protuberances and the like occur and the product yield is reduced markedly, and it was determined that these methods could not be applied to printed circuit boards having a pitch of 80 μm or less.